Arli, A. CagriColak, AyseGazi, OrhanElektronik ve Haberleşme Mühendisliği2020-03-202020-03-202017Arlı, A.Çağrı; Çolak, Ayşe; Gazi, Orhan, "The implementation of a successive cancellation polar decoder on xilinx system generator", 2017 24th IEEE International Conference On Electronics, Cıicuits And Systems (ICECS), pp.372-376, (2017).9781538619117https://doi.org/10.1109/ICECS.2017.8291995Polar coding is the first kind of the capacity achieving codes which are defined for binary-input discrete memoryless channels initially. Parallel processing property of the FPGA allows to decode faster with a margin of complexity. Xilinx System Generator as a practical tool to construct decoding designs in shorter time is a fact. In this study, FPGA implementation of decoding polar codes through Xilinx System Generator is shown.eninfo:eu-repo/semantics/closedAccessCoding TheoryFpgaParalel DecodingConference Object2018-January37237610.1109/ICECS.2017.82919952-s2.0-85047358304WOS:000426974200088N/AN/A