Aktaş, H.Töreyin, Behçet UğurSever, R.Töreyin, B.U.Elektrik-Elektronik Mühendisliği2020-04-192020-04-192015Toreyin, Behcet Ugur; Aktas, Hakan; Sever, Refik, "A Two Stage Template Matching Algorithm and Its Implementation on FPGA", 23nd Signal Processing and Communications Applications Conference (SIU), pp. 2214-2217, (2015).97814673738692165-0608https://doi.org/10.1109/SIU.2015.7130315Toreyin, Behcet Ugur/0000-0003-4406-2783; Aktas, Hakan/0000-0002-0188-7075In this paper, to decrease the computational cost and number of cycles in Template Matching Algorithm, a novel two-stage algorithm is proposed. The Sum of Absolute Differences method is used for matching. The proposed algorithm is implemented on Field-Programmable-Gate-Array (FPGA). The algorithm is accelerated with the effective usage of Block RAMs distributed on FPGA. Thus, the proposed algorithm became fast enough for real time object tracking applications on UAVs. © 2015 IEEE.trinfo:eu-repo/semantics/closedAccessField-Programmable-Gate-Array (Fpga)Memorry AdressingParallel ProcessingSum Of Absolute DifferencesTemplate MatchingUnmanned Air Vehicle (Uav)Conference Object2214221710.1109/SIU.2015.71303152-s2.0-84939170749WOS:000380500900535N/AN/A