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Elektronik ve Haberleşme Mühendisliği Bölümü Yayın Koleksiyonu

Permanent URI for this collectionhttps://hdl.handle.net/20.500.12416/260

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Browsing Elektronik ve Haberleşme Mühendisliği Bölümü Yayın Koleksiyonu by Journal "2017 24th IEEE International Conference On Electronics, Cıicuits And Systems (ICECS)"

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    Citation Count: Arlı, A.Çağrı; Çolak, Ayşe; Gazi, Orhan, "The implementation of a successive cancellation polar decoder on xilinx system generator", 2017 24th IEEE International Conference On Electronics, Cıicuits And Systems (ICECS), pp.372-376, (2017).
    The implementation of a successive cancellation polar decoder on xilinx system generator
    (IEEE, 2017) Arlı, A. Çağrı; Çolak, Ayşe; Gazi, Orhan; 206005; 102896
    Polar coding is the first kind of the capacity achieving codes which are defined for binary-input discrete memoryless channels initially. Parallel processing property of the FPGA allows to decode faster with a margin of complexity. Xilinx System Generator as a practical tool to construct decoding designs in shorter time is a fact. In this study, FPGA implementation of decoding polar codes through Xilinx System Generator is shown.