Çankaya GCRIS Standart veritabanının içerik oluşturulması ve kurulumu Research Ecosystems (https://www.researchecosystems.com) tarafından devam etmektedir. Bu süreçte gördüğünüz verilerde eksikler olabilir.
 

Teaching Computer Architecture by Designing and Simulating Processors From Their Bits and Bytes

dc.authorid Oztoprak, Kasim/0000-0003-2483-8070
dc.authorid Dogan, Mustafa/0009-0005-2591-783X
dc.authorscopusid 58719105800
dc.authorscopusid 21743623400
dc.authorscopusid 6603446979
dc.authorwosid Tolun, Mehmet/Kcj-5958-2024
dc.authorwosid Oztoprak, Kasim/U-1631-2018
dc.contributor.author Dogan, Mustafa
dc.contributor.author Oztoprak, Kasim
dc.contributor.author Tolun, Mehmet Resit
dc.date.accessioned 2025-05-11T17:05:09Z
dc.date.available 2025-05-11T17:05:09Z
dc.date.issued 2024
dc.department Çankaya University en_US
dc.department-temp [Dogan, Mustafa] ASELSAN Res, Ankara, Turkiye; [Dogan, Mustafa] Hacettepe Univ, Dept Comp Engn, Ankara, Turkiye; [Oztoprak, Kasim] Konya Food & Agr Univ, Dept Comp Engn, Konya, Turkiye; [Tolun, Mehmet Resit] Cankaya Univ, Dept Software Engn, Ankara, Turkiye en_US
dc.description Oztoprak, Kasim/0000-0003-2483-8070; Dogan, Mustafa/0009-0005-2591-783X en_US
dc.description.abstract Teaching computer architecture (Comp-Arch) courses in undergraduate curricula is becoming more of a challenge as most students prefer software-oriented courses. In some computer science/engineering departments, Comp-Arch courses are offered without the lab component due to resource constraints and differing pedagogical priorities. This article demonstrates how students working in teams are motivated to study the Comp-Arch course and how instructors can increase student motivation and knowledge by taking advantage of hands-on practices. The teams are asked to design and implement a 16-bit MIPS-like processor with constraints as a specific instruction set, and limited data and instruction memory. Student projects include following three phases, namely, design, desktop simulator implementation, and verification using hardware description language (HDL). In the design phase, teams develop their Comp-Arch to implement specified instructions. A range of designs resulted, e.g., (a) a processor with extensive user-defined instructions resulting in longer cycle times (b) a processor with a minimal instruction set but with a faster clock cycle time. Next, teams developed a desktop simulator in any programming language to execute instructions on the architecture. Finally, students engage in Verilog Hardware Description Language (HDL) projects to simulate and verify the data-path designed during the initial phase. Student feedback and their current understanding of the project were collected through a questionnaire featuring varying Likert scale questions, some with a ten-point scale, and others with a five- point scale. Results of the survey show that the hands-on approach increases students' motivation and knowledge in the Comp-Arch course, which is centered around computer system design principles. This approach can also be effectively extended to related courses, such as Microprocessor Design, which delves into the intricacies of creating and implementing microprocessors or central processing units (CPUs) at the hardware level. Furthermore, the present study demonstrates that interactions, specifically through peer reviews and public presentations, between students in each phase increases their knowledge and perspective on designing custom processors. en_US
dc.description.woscitationindex Science Citation Index Expanded
dc.identifier.doi 10.7717/peerj-cs.1818
dc.identifier.issn 2376-5992
dc.identifier.pmid 38435576
dc.identifier.scopus 2-s2.0-85186908948
dc.identifier.scopusquality Q1
dc.identifier.uri https://doi.org/10.7717/peerj-cs.1818
dc.identifier.uri https://hdl.handle.net/20.500.12416/9647
dc.identifier.volume 10 en_US
dc.identifier.wos WOS:001176948800002
dc.identifier.wosquality Q2
dc.language.iso en en_US
dc.publisher Peerj inc en_US
dc.relation.publicationcategory Makale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanı en_US
dc.rights info:eu-repo/semantics/openAccess en_US
dc.scopus.citedbyCount 0
dc.subject Processor Design en_US
dc.subject Processor Simulator Development en_US
dc.subject Hdl Implementation en_US
dc.subject Computer Architecture en_US
dc.subject Integrated Circuit en_US
dc.subject Hardware Validation en_US
dc.subject Visualization en_US
dc.title Teaching Computer Architecture by Designing and Simulating Processors From Their Bits and Bytes en_US
dc.type Article en_US
dc.wos.citedbyCount 0
dspace.entity.type Publication

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